High-Performance Software Development Challenges in the Post-Moore Era

  Abstract: The end of Moore's Law scaling for VLSI technology implies that significant performance increases for future generations of processors cannot derive from increased transistors counts. Instead, hardware customization and more efficient use of hardware resources are expected to be primary means of performance improvement. Hence, the already challenging task of application software development will get even harder. Advances in software infrastructure such as compilers will be crucial to assist application developers achieve high-performance without loss of productivity and portability.

  A very fundamental challenge faced by compilers is data-locality optimization. The cost of data movement far exceeds the cost of performing arithmetic/logic operations on current processors, both in terms of energy as well as execution time. But while the computational complexity of most practically used algorithms is quite well understood, the same is not true of data-movement complexity. There is a need to develop new abstractions and methodologies, and create tools for characterization and optimization of data movement. This talk will discuss challenges and some promising directions in the quest to achieve the three desirables of performance, productivity, and portability in the development of high-performance software.

  Bio:

  Sadayappan is a Professor in the School of Computing at the University of Utah, with a joint appointment at Pacific Northwest National Laboratory. He was previously a Professor of Computer Science and Engineering and a University Distinguished Scholar at the Ohio State University. His primary research interests center around performance optimization and compiler/runtime systems for high-performance computing, with a special emphasis on high-performance frameworks that enable high productivity for application developers. He collaborates closely with computational scientists and data scientists in developing high-performance domain-specific frameworks and applications. Sadayappan received a B.Tech from the Indian Institute of Technology, Madras, and M.Sc. and Ph.D. from Stony Brook University, all in Electrical Engineering. Sadayappan is an IEEE Fellow.

附件:
澳门水晶宫赌场 钻石最高返水 永利官网开户注册 真人真钱网上棋牌 云盈赌场百家乐
菲律宾太阳城代理 君博赌场娱乐 爱鲨棋牌 澳门永利平台 盈丰真人美女
圣亚女优沙巴体育 美高梅娱乐a99.com 蒙特卡罗代理佣金 百乐宫登入官网 澳门太阳城娱乐网
皇冠代理 正规博彩投注十大网站 申博招一级代理商 ag直营网登入 澳门太阳城游戏体验